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647543

Sigma-Aldrich

Silicon

wafer (single side polished), <111>, N-type, contains no dopant, diam. × thickness 3 in. × 0.5 mm

Synonym(s):

Silicon element

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1 EA
₩358,397
5 EA
₩1,351,574

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1 EA
₩358,397
5 EA
₩1,351,574

About This Item

Linear Formula:
Si
CAS Number:
7440-21-3
Molecular Weight:
28.09
EC Number:
231-130-8
MDL number:
MFCD00085311
UNSPSC Code:
12352300
PubChem Substance ID:
24883544
NACRES:
NA.23

₩358,397

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form

crystalline (cubic (a = 5.4037))
wafer (single side polished)

Quality Level

100

does not contain

dopant

diam. × thickness

3 in. × 0.5 mm

bp

2355 °C (lit.)

mp

1410 °C (lit.)

density

2.33 g/mL at 25 °C (lit.)

semiconductor properties

<111>, N-type

SMILES string

[Si]

InChI

1S/Si

InChI key

XUIMIQQOPSSXEZ-UHFFFAOYSA-N

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Physical properties

0 vortex defects. Etch pitch density (EPD) < 100 (cm-2). Resistivity >1,000 Ω•cm
Oxygen content: ≤ 1~1.8 x 1018 /cm3; Carbon content: ≤ 5 x 1016 /cm3; Boule diameter: 1~8 ″

Storage Class Code

13 - Non Combustible Solids

WGK

WGK 3

Flash Point(F)

Not applicable

Flash Point(C)

Not applicable

Personal Protective Equipment

dust mask type N95 (US), Eyeshields, Gloves

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Certificates of Analysis (COA)

Lot/Batch Number
MKCV8980
MKCT2445
MKCR1599
MKCJ0601
MKBX7511V

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Pil Ju Ko et al.
Journal of nanoscience and nanotechnology, 13(4), 2451-2460 (2013-06-15)
The physical properties of porous materials are being exploited for a wide range of applications including optical biosensors, waveguides, gas sensors, micro capacitors, and solar cells. Here, we review the fast, easy and inexpensive electrochemical anodization based fabrication porous silicon
Jaewoo Lee et al.
Journal of nanoscience and nanotechnology, 13(5), 3495-3499 (2013-07-19)
A spin-casting process for fabricating polycrystalline silicon sheets for use as solar cell wafers is proposed, and the parameters that control the sheet thickness are investigated. A numerical study of the fluidity of molten silicon indicates that the formation of
Youngin Jeon et al.
Journal of nanoscience and nanotechnology, 13(5), 3350-3353 (2013-07-19)
Si-nanowire (NW)-array-based NOT-logic circuits were constructed on plastic substrates. The Si-NW arrays were fabricated on a Si wafer through top-down methods, including conventional photolithography and crystallographic wet etching, and transferred onto the plastic substrates. Two field-effect transistors were fabricated on
Jae Cheol Shin et al.
Journal of nanoscience and nanotechnology, 13(5), 3511-3514 (2013-07-19)
We have characterized the structural properties of the ternary In(x)Ga(1-x)As nanowires (NWs) grown on silicon (Si) substrates using metalorganic chemical vapor deposition (MOCVD). Au catalyzed vapor-liquid-solid (VLS) mode was used for the NW growth. The density of the In(x)Ga(1-x)As NW
Seungil Park et al.
Journal of nanoscience and nanotechnology, 13(5), 3397-3402 (2013-07-19)
We investigated the thin film growths of hydrogenated silicon by hot-wire chemical vapor deposition with different flow rates of SiH4 and H2 mixture ambient and fabricated thin film solar cells by implementing the intrinsic layers to SiC/Si heterojunction p-i-n structures.
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